Dynamic Voltage and Frequency Scaling (DVFS) has been used for a number of years to increase microprocessor performance in terms of speed and computational capabilities. For example, it has been proposed to define Voltage and Frequency Islands (VFI) in an integrated circuit. DVFS techniques can then be applied to these islands in order to locally control the supply voltage and clock frequency of the islands during runtime in order to minimize power consumption while satisfying the computation and throughput requirements. Such a technique is for example discussed in the publication by Suzanne Lesecq et al, entitled “Low-cost and robust control of a DFLL for multi-processor system-on-chip”, proceedings of the 18th World Congress of the International Federation of Automatic Control, Milano (Italy) Aug. 28-Sep. 2, 2011.
The modification of the frequency of an island of an integrated circuit implies modifying the frequency generated by a PLL (Phase Locked Loop) or an FLL (Frequency Locked Loop). Both PLLs and FLLs require a certain convergence period for the output frequency to stabilize at the desired level. However, during this convergence period, power efficiency is generally poor.
There is therefore a need in the art for a circuit allowing relatively rapid voltage/frequency transitions and providing relatively good power efficiency.